1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/interconnect/qcom,rpmh.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm RPMh Network-On-Chip Interconnect
10 - Georgi Djakov <georgi.djakov@linaro.org>
11 - Odelu Kukatla <okukatla@codeaurora.org>
14 RPMh interconnect providers support system bandwidth requirements through
15 RPMh hardware accelerators known as Bus Clock Manager (BCM). The provider is
16 able to communicate with the BCM through the Resource State Coordinator (RSC)
17 associated with each execution environment. Provider nodes must point to at
18 least one RPMh device child node pertaining to their RSC and each provider
19 can map to multiple RPMh resources.
27 - qcom,sc7180-aggre1-noc
28 - qcom,sc7180-aggre2-noc
29 - qcom,sc7180-camnoc-virt
30 - qcom,sc7180-compute-noc
31 - qcom,sc7180-config-noc
34 - qcom,sc7180-ipa-virt
36 - qcom,sc7180-mmss-noc
38 - qcom,sc7180-qup-virt
39 - qcom,sc7180-system-noc
40 - qcom,sc7280-aggre1-noc
41 - qcom,sc7280-aggre2-noc
42 - qcom,sc7280-clk-virt
47 - qcom,sc7280-lpass-ag-noc
49 - qcom,sc7280-mmss-noc
51 - qcom,sc7280-system-noc
52 - qcom,sc8180x-aggre1-noc
53 - qcom,sc8180x-aggre2-noc
54 - qcom,sc8180x-camnoc-virt
55 - qcom,sc8180x-compute-noc
56 - qcom,sc8180x-config-noc
58 - qcom,sc8180x-gem-noc
59 - qcom,sc8180x-ipa-virt
60 - qcom,sc8180x-mc-virt
61 - qcom,sc8180x-mmss-noc
62 - qcom,sc8180x-system-noc
63 - qcom,sdm845-aggre1-noc
64 - qcom,sdm845-aggre2-noc
65 - qcom,sdm845-config-noc
67 - qcom,sdm845-gladiator-noc
69 - qcom,sdm845-mmss-noc
70 - qcom,sdm845-system-noc
74 - qcom,sdx55-system-noc
75 - qcom,sm8150-aggre1-noc
76 - qcom,sm8150-aggre2-noc
77 - qcom,sm8150-camnoc-noc
78 - qcom,sm8150-compute-noc
79 - qcom,sm8150-config-noc
82 - qcom,sm8150-ipa-virt
84 - qcom,sm8150-mmss-noc
85 - qcom,sm8150-system-noc
86 - qcom,sm8250-aggre1-noc
87 - qcom,sm8250-aggre2-noc
88 - qcom,sm8250-compute-noc
89 - qcom,sm8250-config-noc
92 - qcom,sm8250-ipa-virt
94 - qcom,sm8250-mmss-noc
96 - qcom,sm8250-system-noc
97 - qcom,sm8350-aggre1-noc
98 - qcom,sm8350-aggre2-noc
99 - qcom,sm8350-config-noc
101 - qcom,sm8350-gem-noc
102 - qcom,sm8350-lpass-ag-noc
103 - qcom,sm8350-mc-virt
104 - qcom,sm8350-mmss-noc
105 - qcom,sm8350-compute-noc
106 - qcom,sm8350-system-noc
107 - qcom,sm8450-aggre1-noc
108 - qcom,sm8450-aggre2-noc
109 - qcom,sm8450-clk-virt
110 - qcom,sm8450-config-noc
111 - qcom,sm8450-gem-noc
112 - qcom,sm8450-lpass-ag-noc
113 - qcom,sm8450-mc-virt
114 - qcom,sm8450-mmss-noc
115 - qcom,sm8450-nsp-noc
116 - qcom,sm8450-pcie-anoc
117 - qcom,sm8450-system-noc
119 '#interconnect-cells':
123 $ref: /schemas/types.yaml#/definitions/phandle-array
125 List of phandles to qcom,bcm-voter nodes that are required by
126 this interconnect to send RPMh commands.
128 qcom,bcm-voter-names:
130 Names for each of the qcom,bcm-voters specified.
135 - '#interconnect-cells'
138 additionalProperties: false
142 #include <dt-bindings/interconnect/qcom,sdm845.h>
144 mem_noc: interconnect@1380000 {
145 compatible = "qcom,sdm845-mem-noc";
146 reg = <0x01380000 0x27200>;
147 #interconnect-cells = <1>;
148 qcom,bcm-voters = <&apps_bcm_voter>;
151 mmss_noc: interconnect@1740000 {
152 compatible = "qcom,sdm845-mmss-noc";
153 reg = <0x01740000 0x1c1000>;
154 #interconnect-cells = <1>;
155 qcom,bcm-voter-names = "apps", "disp";
156 qcom,bcm-voters = <&apps_bcm_voter>, <&disp_bcm_voter>;