1 Rockchip Successive Approximation Register (SAR) A/D Converter bindings
4 - compatible: should be "rockchip,<name>-saradc" or "rockchip,rk3066-tsadc"
5 - "rockchip,saradc": for rk3188, rk3288
6 - "rockchip,rk3066-tsadc": for rk3036
7 - "rockchip,rk3328-saradc", "rockchip,rk3399-saradc": for rk3328
8 - "rockchip,rk3399-saradc": for rk3399
10 - reg: physical base address of the controller and length of memory mapped
12 - interrupts: The interrupt number to the cpu. The interrupt specifier format
13 depends on the interrupt controller.
14 - clocks: Must contain an entry for each entry in clock-names.
15 - clock-names: Shall be "saradc" for the converter-clock, and "apb_pclk" for
17 - vref-supply: The regulator supply ADC reference voltage.
18 - #io-channel-cells: Should be 1, see ../iio-bindings.txt
21 - resets: Must contain an entry for each entry in reset-names if need support
22 this option. See ../reset/reset.txt for details.
23 - reset-names: Must include the name "saradc-apb".
26 saradc: saradc@2006c000 {
27 compatible = "rockchip,saradc";
28 reg = <0x2006c000 0x100>;
29 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
30 clocks = <&cru SCLK_SARADC>, <&cru PCLK_SARADC>;
31 clock-names = "saradc", "apb_pclk";
32 resets = <&cru SRST_SARADC>;
33 reset-names = "saradc-apb";
34 #io-channel-cells = <1>;
35 vref-supply = <&vcc18>;