1 # SPDX-License-Identifier: (GPL-2.0 OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/iio/adc/atmel,sama5d2-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: AT91 SAMA5D2 Analog to Digital Converter (ADC)
10 - Eugen Hristev <eugen.hristev@microchip.com>
16 - microchip,sam9x60-adc
17 - microchip,sama7g5-adc
34 atmel,min-sample-rate-hz:
35 description: Minimum sampling rate, it depends on SoC.
37 atmel,max-sample-rate-hz:
38 description: Maximum sampling rate, it depends on SoC.
40 atmel,startup-time-ms:
41 description: Startup time expressed in ms, it depends on SoC.
43 atmel,trigger-edge-type:
44 $ref: /schemas/types.yaml#/definitions/uint32
46 One of possible edge types for the ADTRG hardware trigger pin.
47 When the specific edge type is detected, the conversion will
48 start. Should be one of IRQ_TYPE_EDGE_RISING, IRQ_TYPE_EDGE_FALLING
49 or IRQ_TYPE_EDGE_BOTH.
61 additionalProperties: false
71 - atmel,min-sample-rate-hz
72 - atmel,max-sample-rate-hz
73 - atmel,startup-time-ms
77 #include <dt-bindings/dma/at91.h>
78 #include <dt-bindings/interrupt-controller/irq.h>
84 compatible = "atmel,sama5d2-adc";
85 reg = <0xfc030000 0x100>;
86 interrupts = <40 IRQ_TYPE_LEVEL_HIGH 7>;
88 clock-names = "adc_clk";
89 atmel,min-sample-rate-hz = <200000>;
90 atmel,max-sample-rate-hz = <20000000>;
91 atmel,startup-time-ms = <4>;
92 vddana-supply = <&vdd_3v3_lp_reg>;
93 vref-supply = <&vdd_3v3_lp_reg>;
94 atmel,trigger-edge-type = <IRQ_TYPE_EDGE_BOTH>;
95 dmas = <&dma0 (AT91_XDMAC_DT_MEM_IF(0) | AT91_XDMAC_DT_PER_IF(1) | AT91_XDMAC_DT_PERID(25))>;
97 #io-channel-cells = <1>;