1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/iio/adc/adi,axi-adc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Analog Devices AXI ADC IP core
10 - Michael Hennerich <michael.hennerich@analog.com>
11 - Alexandru Ardelean <alexandru.ardelean@analog.com>
14 Analog Devices Generic AXI ADC IP core for interfacing an ADC device
15 with a high speed serial (JESD204B/C) or source synchronous parallel
16 interface (LVDS/CMOS).
17 Usually, some other interface type (i.e SPI) is used as a control
18 interface for the actual ADC, while this IP core will interface
19 to the data-lines of the ADC and handle the streaming of data into
22 https://wiki.analog.com/resources/fpga/docs/axi_adc_ip
40 $ref: /schemas/types.yaml#/definitions/phandle
42 A reference to a the actual ADC to which this FPGA ADC interfaces to.
50 additionalProperties: false
55 compatible = "adi,axi-adc-10.0.a";
56 reg = <0x44a00000 0x10000>;
60 adi,adc-dev = <&spi_adc>;