3ed172629974079862a3fa3e84ba5292d39ca820
[linux-2.6-microblaze.git] / Documentation / devicetree / bindings / gpu / vivante,gc.yaml
1 # SPDX-License-Identifier: GPL-2.0
2 %YAML 1.2
3 ---
4 $id: http://devicetree.org/schemas/gpu/vivante,gc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
6
7 title: Vivante GPU Bindings
8
9 description: Vivante GPU core devices
10
11 maintainers:
12   - Lucas Stach <l.stach@pengutronix.de>
13
14 properties:
15   compatible:
16     const: vivante,gc
17
18   reg:
19     maxItems: 1
20
21   interrupts:
22     maxItems: 1
23
24   '#cooling-cells':
25     const: 2
26
27   assigned-clock-parents: true
28   assigned-clock-rates: true
29   assigned-clocks: true
30
31   clocks:
32     items:
33       - description: AXI/master interface clock
34       - description: GPU core clock
35       - description: Shader clock (only required if GPU has feature PIPE_3D)
36       - description: AHB/slave interface clock (only required if GPU can gate
37           slave interface independently)
38     minItems: 1
39     maxItems: 4
40
41   clock-names:
42     items:
43       enum: [ bus, core, shader, reg ]
44     minItems: 1
45     maxItems: 4
46
47   resets:
48     maxItems: 1
49
50   power-domains:
51     maxItems: 1
52
53 required:
54   - compatible
55   - reg
56   - interrupts
57   - clocks
58   - clock-names
59
60 additionalProperties: false
61
62 examples:
63   - |
64     #include <dt-bindings/clock/imx6qdl-clock.h>
65     #include <dt-bindings/interrupt-controller/arm-gic.h>
66     gpu@130000 {
67       compatible = "vivante,gc";
68       reg = <0x00130000 0x4000>;
69       interrupts = <0 9 IRQ_TYPE_LEVEL_HIGH>;
70       clocks = <&clks IMX6QDL_CLK_GPU3D_AXI>,
71                <&clks IMX6QDL_CLK_GPU3D_CORE>,
72                <&clks IMX6QDL_CLK_GPU3D_SHADER>;
73       clock-names = "bus", "core", "shader";
74       power-domains = <&gpc 1>;
75     };
76
77 ...