1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/gpu/arm,mali-utgard.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: ARM Mali Utgard GPU
10 - Rob Herring <robh@kernel.org>
11 - Maxime Ripard <maxime.ripard@free-electrons.com>
12 - Heiko Stuebner <heiko@sntech.de>
16 pattern: '^gpu@[a-f0-9]+$'
20 - const: allwinner,sun8i-a23-mali
21 - const: allwinner,sun7i-a20-mali
25 - allwinner,sun4i-a10-mali
26 - allwinner,sun7i-a20-mali
27 - allwinner,sun8i-h3-mali
28 - allwinner,sun50i-a64-mali
29 - rockchip,rk3036-mali
30 - rockchip,rk3066-mali
31 - rockchip,rk3188-mali
32 - rockchip,rk3228-mali
33 - samsung,exynos4210-mali
34 - stericsson,db8500-mali
38 - allwinner,sun50i-h5-mali
40 - amlogic,meson8b-mali
41 - amlogic,meson-gxbb-mali
42 - amlogic,meson-gxl-mali
43 - hisilicon,hi6220-mali
44 - mediatek,mt7623-mali
45 - rockchip,rk3328-mali
59 - additionalItems: true
63 # At least enforce the first 2 interrupts
67 # Not ideal as any order and combination are allowed
69 - gp # Geometry Processor interrupt
70 - gpmmu # Geometry Processor MMU interrupt
71 - pp # Pixel Processor broadcast interrupt (mali-450 only)
72 - pp0 # Pixel Processor X interrupt (X from 0 to 7)
73 - ppmmu0 # Pixel Processor X MMU interrupt (X from 0 to 7)
88 - pmu # Power Management Unit interrupt (optional)
89 - combined # stericsson,db8500-mali only
109 operating-points-v2: true
122 additionalProperties: false
130 - allwinner,sun4i-a10-mali
131 - allwinner,sun7i-a20-mali
132 - allwinner,sun50i-a64-mali
133 - allwinner,sun50i-h5-mali
134 - amlogic,meson8-mali
135 - amlogic,meson8b-mali
136 - hisilicon,hi6220-mali
137 - mediatek,mt7623-mali
138 - rockchip,rk3036-mali
139 - rockchip,rk3066-mali
140 - rockchip,rk3188-mali
141 - rockchip,rk3228-mali
142 - rockchip,rk3328-mali
149 #include <dt-bindings/interrupt-controller/irq.h>
150 #include <dt-bindings/interrupt-controller/arm-gic.h>
153 compatible = "allwinner,sun7i-a20-mali", "arm,mali-400";
154 reg = <0x01c40000 0x10000>;
155 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,
156 <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,
157 <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,
158 <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,
159 <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
160 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>,
161 <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
162 interrupt-names = "gp",
169 clocks = <&ccu 1>, <&ccu 2>;
170 clock-names = "bus", "core";
172 #cooling-cells = <2>;