1 * Freescale VF610 PORT/GPIO module
3 The Freescale PORT/GPIO modules are two adjacent modules providing GPIO
4 functionality. Each pair serves 32 GPIOs. The VF610 has 5 instances of
5 each, and each PORT module has its own interrupt.
7 Required properties for GPIO node:
8 - compatible : Should be "fsl,<soc>-gpio", below is supported list:
11 - reg : The first reg tuple represents the PORT module, the second tuple
13 - interrupts : Should be the port interrupt shared by all 32 pins.
14 - gpio-controller : Marks the device node as a gpio controller.
15 - #gpio-cells : Should be two. The first cell is the pin number and
16 the second cell is used to specify the gpio polarity:
19 - interrupt-controller: Marks the device node as an interrupt controller.
20 - #interrupt-cells : Should be 2. The first cell is the GPIO number.
21 The second cell bits[3:0] is used to specify trigger type and level flags:
22 1 = low-to-high edge triggered.
23 2 = high-to-low edge triggered.
24 4 = active high level-sensitive.
25 8 = active low level-sensitive.
28 -clocks: Must contain an entry for each entry in clock-names.
29 See common clock-bindings.txt for details.
30 -clock-names: A list of clock names. For imx7ulp, it must contain
33 Note: Each GPIO port should have an alias correctly numbered in "aliases"
43 gpio1: gpio@40049000 {
44 compatible = "fsl,vf610-gpio";
45 reg = <0x40049000 0x1000 0x400ff000 0x40>;
46 interrupts = <0 107 IRQ_TYPE_LEVEL_HIGH>;
50 #interrupt-cells = <2>;
51 gpio-ranges = <&iomuxc 0 0 32>;
54 gpio2: gpio@4004a000 {
55 compatible = "fsl,vf610-gpio";
56 reg = <0x4004a000 0x1000 0x400ff040 0x40>;
57 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
61 #interrupt-cells = <2>;
62 gpio-ranges = <&iomuxc 0 32 32>;