Documentation/devicetree/bindings/display/mediatek/mediatek,ufoe.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/mediatek/mediatek,ufoe.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Mediatek display UFOe
   8
   9 maintainers:
  10   - Chun-Kuang Hu <chunkuang.hu@kernel.org>
  11   - Philipp Zabel <p.zabel@pengutronix.de>
  12
  13 description: |
  14   Mediatek display UFOe stands for Unified Frame Optimization engine.
  15   UFOe can cut the data rate for DSI port which may lead to reduce power
  16   consumption.
  17   UFOe device node must be siblings to the central MMSYS_CONFIG node.
  18   For a description of the MMSYS_CONFIG binding, see
  19   Documentation/devicetree/bindings/arm/mediatek/mediatek,mmsys.yaml
  20   for details.
  21
  22 properties:
  23   compatible:
  24     oneOf:
  25       - items:
  26           - const: mediatek,mt8173-disp-ufoe
  27
  28   reg:
  29     maxItems: 1
  30
  31   interrupts:
  32     maxItems: 1
  33
  34   power-domains:
  35     description: A phandle and PM domain specifier as defined by bindings of
  36       the power controller specified by phandle. See
  37       Documentation/devicetree/bindings/power/power-domain.yaml for details.
  38
  39   clocks:
  40     items:
  41       - description: UFOe Clock
  42
  43 required:
  44   - compatible
  45   - reg
  46   - interrupts
  47   - power-domains
  48   - clocks
  49
  50 additionalProperties: false
  51
  52 examples:
  53   - |
  54     #include <dt-bindings/interrupt-controller/arm-gic.h>
  55     #include <dt-bindings/clock/mt8173-clk.h>
  56     #include <dt-bindings/power/mt8173-power.h>
  57     soc {
  58         #address-cells = <2>;
  59         #size-cells = <2>;
  60
  61         ufoe@1401a000 {
  62             compatible = "mediatek,mt8173-disp-ufoe";
  63             reg = <0 0x1401a000 0 0x1000>;
  64             interrupts = <GIC_SPI 191 IRQ_TYPE_LEVEL_LOW>;
  65             power-domains = <&scpsys MT8173_POWER_DOMAIN_MM>;
  66             clocks = <&mmsys CLK_MM_DISP_UFOE>;
  67         };
  68     };