Documentation/devicetree/bindings/display/brcm,bcm2835-dsi0.yaml

   1 # SPDX-License-Identifier: GPL-2.0
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/display/brcm,bcm2835-dsi0.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Broadcom VC4 (VideoCore4) DSI Controller
   8
   9 maintainers:
  10   - Eric Anholt <eric@anholt.net>
  11
  12 allOf:
  13   - $ref: dsi-controller.yaml#
  14
  15 properties:
  16   "#clock-cells":
  17     const: 1
  18
  19   compatible:
  20     enum:
  21       - brcm,bcm2711-dsi1
  22       - brcm,bcm2835-dsi0
  23       - brcm,bcm2835-dsi1
  24
  25   reg:
  26     maxItems: 1
  27
  28   clocks:
  29     items:
  30       - description: The DSI PLL clock feeding the DSI analog PHY
  31       - description: The DSI ESC clock
  32       - description: The DSI pixel clock
  33
  34   clock-names:
  35     items:
  36       - const: phy
  37       - const: escape
  38       - const: pixel
  39
  40   clock-output-names: true
  41     # FIXME: The meta-schemas don't seem to allow it for now
  42     # items:
  43     #   - description: The DSI byte clock for the PHY
  44     #   - description: The DSI DDR2 clock
  45     #   - description: The DSI DDR clock
  46
  47   interrupts:
  48     maxItems: 1
  49
  50 required:
  51   - "#clock-cells"
  52   - compatible
  53   - reg
  54   - clocks
  55   - clock-names
  56   - clock-output-names
  57   - interrupts
  58
  59 unevaluatedProperties: false
  60
  61 examples:
  62   - |
  63     #include <dt-bindings/clock/bcm2835.h>
  64
  65     dsi1: dsi@7e700000 {
  66         compatible = "brcm,bcm2835-dsi1";
  67         reg = <0x7e700000 0x8c>;
  68         interrupts = <2 12>;
  69         #address-cells = <1>;
  70         #size-cells = <0>;
  71         #clock-cells = <1>;
  72
  73         clocks = <&clocks BCM2835_PLLD_DSI1>,
  74                  <&clocks BCM2835_CLOCK_DSI1E>,
  75                  <&clocks BCM2835_CLOCK_DSI1P>;
  76         clock-names = "phy", "escape", "pixel";
  77
  78         clock-output-names = "dsi1_byte", "dsi1_ddr2", "dsi1_ddr";
  79
  80     };
  81
  82 ...