1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/display/allwinner,sun8i-r40-tcon-top.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Allwinner R40 TCON TOP Device Tree Bindings
10 - Chen-Yu Tsai <wens@csie.org>
11 - Maxime Ripard <mripard@kernel.org>
14 TCON TOPs main purpose is to configure whole display pipeline. It
15 determines relationships between mixers and TCONs, selects source
16 TCON for HDMI, muxes LCD and TV encoder GPIO output, selects TV
17 encoder clock source and contains additional TV TCON and DSI gates.
19 It allows display pipeline to be configured in very different ways:
25 \ / [1] TCON-LCD1 - LCD1/LVDS1
27 / \ [2] TCON-TV0 [0] - TVE0/RGB
31 \ [3] TCON-TV1 [1] - TVE1/RGB
33 Note that both TCON TOP references same physical unit. Both mixers
34 can be connected to any TCON. Not all TCON TOP variants support all
43 - allwinner,sun8i-r40-tcon-top
44 - allwinner,sun50i-h6-tcon-top
53 - description: The TCON TOP interface clock
54 - description: The TCON TOP TV0 clock
55 - description: The TCON TOP TVE0 clock
56 - description: The TCON TOP TV1 clock
57 - description: The TCON TOP TVE1 clock
58 - description: The TCON TOP MIPI DSI clock
75 The first item is the name of the clock created for the TV0
76 channel, the second item is the name of the TCON TV1 channel
77 clock and the third one is the name of the DSI channel clock.
83 $ref: /schemas/graph.yaml#/properties/ports
87 $ref: /schemas/graph.yaml#/properties/port
89 Input endpoint for Mixer 0 mux.
92 $ref: /schemas/graph.yaml#/properties/port
94 Output endpoint for Mixer 0 mux
97 $ref: /schemas/graph.yaml#/properties/port
99 Input endpoint for Mixer 1 mux.
102 $ref: /schemas/graph.yaml#/properties/port
104 Output endpoint for Mixer 1 mux
107 $ref: /schemas/graph.yaml#/properties/port
109 Input endpoint for HDMI mux.
112 $ref: /schemas/graph.yaml#/properties/port
114 Output endpoint for HDMI mux
132 additionalProperties: false
138 const: allwinner,sun50i-h6-tcon-top
163 #include <dt-bindings/interrupt-controller/arm-gic.h>
165 #include <dt-bindings/clock/sun8i-r40-ccu.h>
166 #include <dt-bindings/reset/sun8i-r40-ccu.h>
168 tcon_top: tcon-top@1c70000 {
169 compatible = "allwinner,sun8i-r40-tcon-top";
170 reg = <0x01c70000 0x1000>;
171 clocks = <&ccu CLK_BUS_TCON_TOP>,
183 clock-output-names = "tcon-top-tv0",
186 resets = <&ccu RST_BUS_TCON_TOP>;
190 #address-cells = <1>;
193 tcon_top_mixer0_in: port@0 {
196 tcon_top_mixer0_in_mixer0: endpoint {
197 remote-endpoint = <&mixer0_out_tcon_top>;
201 tcon_top_mixer0_out: port@1 {
202 #address-cells = <1>;
206 tcon_top_mixer0_out_tcon_lcd0: endpoint@0 {
210 tcon_top_mixer0_out_tcon_lcd1: endpoint@1 {
214 tcon_top_mixer0_out_tcon_tv0: endpoint@2 {
216 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer0>;
219 tcon_top_mixer0_out_tcon_tv1: endpoint@3 {
221 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer0>;
225 tcon_top_mixer1_in: port@2 {
226 #address-cells = <1>;
230 tcon_top_mixer1_in_mixer1: endpoint@1 {
232 remote-endpoint = <&mixer1_out_tcon_top>;
236 tcon_top_mixer1_out: port@3 {
237 #address-cells = <1>;
241 tcon_top_mixer1_out_tcon_lcd0: endpoint@0 {
245 tcon_top_mixer1_out_tcon_lcd1: endpoint@1 {
249 tcon_top_mixer1_out_tcon_tv0: endpoint@2 {
251 remote-endpoint = <&tcon_tv0_in_tcon_top_mixer1>;
254 tcon_top_mixer1_out_tcon_tv1: endpoint@3 {
256 remote-endpoint = <&tcon_tv1_in_tcon_top_mixer1>;
260 tcon_top_hdmi_in: port@4 {
261 #address-cells = <1>;
265 tcon_top_hdmi_in_tcon_tv0: endpoint@0 {
267 remote-endpoint = <&tcon_tv0_out_tcon_top>;
270 tcon_top_hdmi_in_tcon_tv1: endpoint@1 {
272 remote-endpoint = <&tcon_tv1_out_tcon_top>;
276 tcon_top_hdmi_out: port@5 {
279 tcon_top_hdmi_out_hdmi: endpoint {
280 remote-endpoint = <&hdmi_in_tcon_top>;