1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
4 $id: http://devicetree.org/schemas/clock/tesla,fsd-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Tesla FSD (Full Self-Driving) SoC clock controller
10 - Alim Akhtar <alim.akhtar@samsung.com>
14 FSD clock controller consist of several clock management unit
15 (CMU), which generates clocks for various inteernal SoC blocks.
16 The root clock comes from external OSC clock (24 MHz).
18 All available clocks are defined as preprocessor macros in
19 'dt-bindings/clock/fsd-clk.h' header.
25 - tesla,fsd-clock-imem
26 - tesla,fsd-clock-peric
27 - tesla,fsd-clock-fsys0
28 - tesla,fsd-clock-fsys1
30 - tesla,fsd-clock-cam_csi
51 const: tesla,fsd-clock-cmu
56 - description: External reference clock (24 MHz)
65 const: tesla,fsd-clock-imem
70 - description: External reference clock (24 MHz)
71 - description: IMEM TCU clock (from CMU_CMU)
72 - description: IMEM bus clock (from CMU_CMU)
73 - description: IMEM DMA clock (from CMU_CMU)
77 - const: dout_cmu_imem_tcuclk
78 - const: dout_cmu_imem_aclk
79 - const: dout_cmu_imem_dmaclk
85 const: tesla,fsd-clock-peric
90 - description: External reference clock (24 MHz)
91 - description: Shared0 PLL div4 clock (from CMU_CMU)
92 - description: PERIC shared1 div36 clock (from CMU_CMU)
93 - description: PERIC shared0 div3 TBU clock (from CMU_CMU)
94 - description: PERIC shared0 div20 clock (from CMU_CMU)
95 - description: PERIC shared1 div4 DMAclock (from CMU_CMU)
99 - const: dout_cmu_pll_shared0_div4
100 - const: dout_cmu_peric_shared1div36
101 - const: dout_cmu_peric_shared0div3_tbuclk
102 - const: dout_cmu_peric_shared0div20
103 - const: dout_cmu_peric_shared1div4_dmaclk
109 const: tesla,fsd-clock-fsys0
114 - description: External reference clock (24 MHz)
115 - description: Shared0 PLL div6 clock (from CMU_CMU)
116 - description: FSYS0 shared1 div4 clock (from CMU_CMU)
117 - description: FSYS0 shared0 div4 clock (from CMU_CMU)
121 - const: dout_cmu_pll_shared0_div6
122 - const: dout_cmu_fsys0_shared1div4
123 - const: dout_cmu_fsys0_shared0div4
129 const: tesla,fsd-clock-fsys1
134 - description: External reference clock (24 MHz)
135 - description: FSYS1 shared0 div8 clock (from CMU_CMU)
136 - description: FSYS1 shared0 div4 clock (from CMU_CMU)
140 - const: dout_cmu_fsys1_shared0div8
141 - const: dout_cmu_fsys1_shared0div4
147 const: tesla,fsd-clock-mfc
152 - description: External reference clock (24 MHz)
161 const: tesla,fsd-clock-cam_csi
166 - description: External reference clock (24 MHz)
178 additionalProperties: false
181 # Clock controller node for CMU_FSYS1
183 #include <dt-bindings/clock/fsd-clk.h>
185 clock_fsys1: clock-controller@16810000 {
186 compatible = "tesla,fsd-clock-fsys1";
187 reg = <0x16810000 0x3000>;
191 <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV8>,
192 <&clock_cmu DOUT_CMU_FSYS1_SHARED0DIV4>;
193 clock-names = "fin_pll",
194 "dout_cmu_fsys1_shared0div8",
195 "dout_cmu_fsys1_shared0div4";