1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
2 # Copyright 2019 Unisoc Inc.
5 $id: "http://devicetree.org/schemas/clock/sprd,sc9863a-clk.yaml#"
6 $schema: "http://devicetree.org/meta-schemas/core.yaml#"
8 title: SC9863A Clock Control Unit Device Tree Bindings
11 - Orson Zhai <orsonzhai@gmail.com>
12 - Baolin Wang <baolin.wang7@gmail.com>
13 - Chunyan Zhang <zhang.lyra@gmail.com>
22 - sprd,sc9863a-aon-clk
23 - sprd,sc9863a-apahb-gate
24 - sprd,sc9863a-pmu-gate
25 - sprd,sc9863a-aonapb-gate
30 - sprd,sc9863a-mm-gate
32 - sprd,sc9863a-apapb-gate
38 The input parent clock(s) phandle for this clock, only list fixed
39 clocks which are declared in devicetree.
62 - sprd,sc9863a-aon-clk
69 Other SC9863a clock nodes should be the child of a syscon node in
70 which compatible string shoule be:
71 "sprd,sc9863a-glbregs", "syscon", "simple-mfd"
73 The 'reg' property for the clock node is also required if there is a sub
74 range of registers for the clocks.
78 ap_clk: clock-controller@21500000 {
79 compatible = "sprd,sc9863a-ap-clk";
80 reg = <0x21500000 0x1000>;
81 clocks = <&ext_26m>, <&ext_32k>;
82 clock-names = "ext-26m", "ext-32k";
88 compatible = "sprd,sc9863a-glbregs", "syscon", "simple-mfd";
89 reg = <0x20e00000 0x4000>;
92 ranges = <0 0x20e00000 0x4000>;
94 apahb_gate: apahb-gate@0 {
95 compatible = "sprd,sc9863a-apahb-gate";