1 # SPDX-License-Identifier: (GPL-2.0+ OR MIT)
4 $id: http://devicetree.org/schemas/clock/rockchip,rv1108-cru.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Rockchip RV1108 Clock and Reset Unit (CRU)
10 - Elaine Zhang <zhangqing@rock-chips.com>
11 - Heiko Stuebner <heiko@sntech.de>
14 The RV1108 clock controller generates and supplies clocks to various
15 controllers within the SoC and also implements a reset controller for SoC
17 Each clock is assigned an identifier and client nodes can use this identifier
18 to specify the clock which they consume. All available clocks are defined as
19 preprocessor macros in the dt-bindings/clock/rv1108-cru.h headers and can be
20 used in device tree sources. Similar macros exist for the reset sources in
22 There are several clocks that are generated outside the SoC. It is expected
23 that they are defined using standard clock bindings with following
25 - "xin24m" - crystal input - required
26 - "ext_vip" - external VIP clock - optional
27 - "ext_i2s" - external I2S clock - optional
28 - "ext_gmac" - external GMAC clock - optional
29 - "hdmiphy" - external clock input derived from HDMI PHY - optional
30 - "usbphy" - external clock input derived from USB PHY - optional
53 $ref: /schemas/types.yaml#/definitions/phandle
55 Phandle to the syscon managing the "general register files" (GRF),
56 if missing pll rates are not changeable, due to the missing pll
65 additionalProperties: false
69 cru: clock-controller@20200000 {
70 compatible = "rockchip,rv1108-cru";
71 reg = <0x20200000 0x1000>;
72 rockchip,grf = <&grf>;