Documentation/devicetree/bindings/clock/qcom,sm8350-videocc.yaml

   1 # SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)
   2 %YAML 1.2
   3 ---
   4 $id: http://devicetree.org/schemas/clock/qcom,sm8350-videocc.yaml#
   5 $schema: http://devicetree.org/meta-schemas/core.yaml#
   6
   7 title: Qualcomm SM8350 Video Clock & Reset Controller
   8
   9 maintainers:
  10   - Konrad Dybcio <konrad.dybcio@linaro.org>
  11
  12 description: |
  13   Qualcomm video clock control module provides the clocks, resets and power
  14   domains on Qualcomm SoCs.
  15
  16   See also::
  17     include/dt-bindings/clock/qcom,videocc-sm8350.h
  18     include/dt-bindings/reset/qcom,videocc-sm8350.h
  19
  20 properties:
  21   compatible:
  22     enum:
  23       - qcom,sc8280xp-videocc
  24       - qcom,sm8350-videocc
  25
  26   clocks:
  27     items:
  28       - description: Board XO source
  29       - description: Board active XO source
  30       - description: Board sleep clock
  31
  32   power-domains:
  33     description:
  34       A phandle and PM domain specifier for the MMCX power domain.
  35     maxItems: 1
  36
  37   required-opps:
  38     description:
  39       A phandle to an OPP node describing required MMCX performance point.
  40     maxItems: 1
  41
  42 required:
  43   - compatible
  44   - clocks
  45   - power-domains
  46   - required-opps
  47
  48 allOf:
  49   - $ref: qcom,gcc.yaml#
  50
  51 unevaluatedProperties: false
  52
  53 examples:
  54   - |
  55     #include <dt-bindings/clock/qcom,rpmh.h>
  56     #include <dt-bindings/power/qcom,rpmhpd.h>
  57
  58     clock-controller@abf0000 {
  59       compatible = "qcom,sm8350-videocc";
  60       reg = <0x0abf0000 0x10000>;
  61       clocks = <&rpmhcc RPMH_CXO_CLK>,
  62                <&rpmhcc RPMH_CXO_CLK_A>,
  63                <&sleep_clk>;
  64       power-domains = <&rpmhpd RPMHPD_MMCX>;
  65       required-opps = <&rpmhpd_opp_low_svs>;
  66       #clock-cells = <1>;
  67       #reset-cells = <1>;
  68       #power-domain-cells = <1>;
  69     };
  70 ...