1 # SPDX-License-Identifier: GPL-2.0-only
4 $id: http://devicetree.org/schemas/clock/qcom,mmcc.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Qualcomm Multimedia Clock & Reset Controller Binding
10 - Jeffrey Hugo <jhugo@codeaurora.org>
11 - Taniya Das <tdas@codeaurora.org>
14 Qualcomm multimedia clock control module which supports the clocks, resets and
30 - description: Board XO source
31 - description: Board sleep source
32 - description: Global PLL 0 clock
33 - description: DSI phy instance 0 dsi clock
34 - description: DSI phy instance 0 byte clock
35 - description: DSI phy instance 1 dsi clock
36 - description: DSI phy instance 1 byte clock
37 - description: HDMI phy PLL clock
38 - description: DisplayPort phy PLL vco clock
39 - description: DisplayPort phy PLL link clock
60 '#power-domain-cells':
68 Protected clock specifier list as per common clock binding
72 Regulator supply for the GPU_GX GDSC
79 - '#power-domain-cells'
81 additionalProperties: false
87 const: qcom,mmcc-msm8998
95 # Example for MMCC for MSM8960:
97 clock-controller@4000000 {
98 compatible = "qcom,mmcc-msm8960";
99 reg = <0x4000000 0x1000>;
102 #power-domain-cells = <1>;