1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/clock/marvell,mmp2-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: Marvell MMP2 and MMP3 Clock Controller
10 - Lubomir Rintel <lkundrak@v3.sk>
13 The clock subsystem on MMP2 or MMP3 generates and supplies clock to various
14 controllers within the SoC.
16 Each clock is assigned an identifier and client nodes use this identifier
17 to specify the clock which they consume.
19 All these identifiers could be found in <dt-bindings/clock/marvell,mmp2.h>.
24 - marvell,mmp2-clock # controller compatible with MMP2 SoC
25 - marvell,mmp3-clock # controller compatible with MMP3 SoC
29 - description: MPMU register region
30 - description: APMU register region
31 - description: APBC register region
45 '#power-domain-cells':
54 - '#power-domain-cells'
56 additionalProperties: false
60 clock-controller@d4050000 {
61 compatible = "marvell,mmp2-clock";
62 reg = <0xd4050000 0x1000>,
65 reg-names = "mpmu", "apmu", "apbc";
68 #power-domain-cells = <1>;