1 # SPDX-License-Identifier: GPL-2.0
4 $id: http://devicetree.org/schemas/clock/imx8m-clock.yaml#
5 $schema: http://devicetree.org/meta-schemas/core.yaml#
7 title: NXP i.MX8M Family Clock Control Module Binding
10 - Anson Huang <Anson.Huang@nxp.com>
13 NXP i.MX8M Mini/Nano/Plus/Quad clock control module is an integrated clock
14 controller, which generates and supplies to all modules.
38 The clock consumer should specify the desired clock by having the clock
39 ID in its "clocks" phandle cell. See include/dt-bindings/clock/imx8m-clock.h
40 for the full list of i.MX8M clock IDs.
61 - description: 32k osc
62 - description: 25m osc
63 - description: 27m osc
64 - description: ext1 clock input
65 - description: ext2 clock input
66 - description: ext3 clock input
67 - description: ext4 clock input
83 - description: 32k osc
84 - description: 24m osc
85 - description: ext1 clock input
86 - description: ext2 clock input
87 - description: ext3 clock input
88 - description: ext4 clock input
99 additionalProperties: false
102 # Clock Control Module node:
104 clock-controller@30380000 {
105 compatible = "fsl,imx8mm-ccm";
106 reg = <0x30380000 0x10000>;
108 clocks = <&osc_32k>, <&osc_24m>, <&clk_ext1>, <&clk_ext2>,
109 <&clk_ext3>, <&clk_ext4>;
110 clock-names = "osc_32k", "osc_24m", "clk_ext1", "clk_ext2",
111 "clk_ext3", "clk_ext4";
115 clock-controller@30390000 {
116 compatible = "fsl,imx8mq-ccm";
117 reg = <0x30380000 0x10000>;
119 clocks = <&ckil>, <&osc_25m>, <&osc_27m>, <&clk_ext1>,
120 <&clk_ext2>, <&clk_ext3>, <&clk_ext4>;
121 clock-names = "ckil", "osc_25m", "osc_27m", "clk_ext1",
122 "clk_ext2", "clk_ext3", "clk_ext4";