Documentation/devicetree/bindings/ata/ahci-platform.txt

   1 * AHCI SATA Controller
   2
   3 SATA nodes are defined to describe on-chip Serial ATA controllers.
   4 Each SATA controller should have its own node.
   5
   6 It is possible, but not required, to represent each port as a sub-node.
   7 It allows to enable each port independently when dealing with multiple
   8 PHYs.
   9
  10 Required properties:
  11 - compatible        : compatible string, one of:
  12   - "allwinner,sun4i-a10-ahci"
  13   - "brcm,iproc-ahci"
  14   - "hisilicon,hisi-ahci"
  15   - "cavium,octeon-7130-ahci"
  16   - "ibm,476gtr-ahci"
  17   - "marvell,armada-380-ahci"
  18   - "marvell,armada-3700-ahci"
  19   - "snps,dwc-ahci"
  20   - "snps,exynos5440-ahci"
  21   - "snps,spear-ahci"
  22   - "generic-ahci"
  23 - interrupts        : <interrupt mapping for SATA IRQ>
  24 - reg               : <registers mapping>
  25
  26 Please note that when using "generic-ahci" you must also specify a SoC specific
  27 compatible:
  28         compatible = "manufacturer,soc-model-ahci", "generic-ahci";
  29
  30 Optional properties:
  31 - dma-coherent      : Present if dma operations are coherent
  32 - clocks            : a list of phandle + clock specifier pairs
  33 - resets            : a list of phandle + reset specifier pairs
  34 - target-supply     : regulator for SATA target power
  35 - phys              : reference to the SATA PHY node
  36 - phy-names         : must be "sata-phy"
  37 - ports-implemented : Mask that indicates which ports that the HBA supports
  38                       are available for software to use. Useful if PORTS_IMPL
  39                       is not programmed by the BIOS, which is true with
  40                       some embedded SOC's.
  41
  42 Required properties when using sub-nodes:
  43 - #address-cells    : number of cells to encode an address
  44 - #size-cells       : number of cells representing the size of an address
  45
  46
  47 Sub-nodes required properties:
  48 - reg               : the port number
  49 And at least one of the following properties:
  50 - phys              : reference to the SATA PHY node
  51 - target-supply    : regulator for SATA target power
  52
  53 Examples:
  54         sata@ffe08000 {
  55                 compatible = "snps,spear-ahci";
  56                 reg = <0xffe08000 0x1000>;
  57                 interrupts = <115>;
  58         };
  59
  60         ahci: sata@1c18000 {
  61                 compatible = "allwinner,sun4i-a10-ahci";
  62                 reg = <0x01c18000 0x1000>;
  63                 interrupts = <56>;
  64                 clocks = <&pll6 0>, <&ahb_gates 25>;
  65                 target-supply = <&reg_ahci_5v>;
  66         };
  67
  68 With sub-nodes:
  69         sata@f7e90000 {
  70                 compatible = "marvell,berlin2q-achi", "generic-ahci";
  71                 reg = <0xe90000 0x1000>;
  72                 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
  73                 clocks = <&chip CLKID_SATA>;
  74                 #address-cells = <1>;
  75                 #size-cells = <0>;
  76
  77                 sata0: sata-port@0 {
  78                         reg = <0>;
  79                         phys = <&sata_phy 0>;
  80                         target-supply = <&reg_sata0>;
  81                 };
  82
  83                 sata1: sata-port@1 {
  84                         reg = <1>;
  85                         phys = <&sata_phy 1>;
  86                         target-supply = <&reg_sata1>;;
  87                 };
  88         };