1 SP810 System Controller
2 -----------------------
6 - compatible: standard compatible string for a Primecell peripheral,
7 see Documentation/devicetree/bindings/arm/primecell.yaml
9 should be: "arm,sp810", "arm,primecell"
11 - reg: standard registers property, physical address and size
12 of the control registers
14 - clock-names: from the common clock bindings, for more details see
15 Documentation/devicetree/bindings/clock/clock-bindings.txt;
16 should be: "refclk", "timclk", "apb_pclk"
18 - clocks: from the common clock bindings, phandle and clock
19 specifier pairs for the entries of clock-names property
21 - #clock-cells: from the common clock bindings;
24 - clock-output-names: from the common clock bindings;
25 should be: "timerclken0", "timerclken1", "timerclken2", "timerclken3"
27 - assigned-clocks: from the common clock binding;
28 should be: clock specifier for each output clock of this
31 - assigned-clock-parents: from the common clock binding;
32 should be: phandle of input clock listed in clocks
33 property with the highest frequency
36 v2m_sysctl: sysctl@20000 {
37 compatible = "arm,sp810", "arm,primecell";
38 reg = <0x020000 0x1000>;
39 clocks = <&v2m_refclk32khz>, <&v2m_refclk1mhz>, <&smbclk>;
40 clock-names = "refclk", "timclk", "apb_pclk";
42 clock-output-names = "timerclken0", "timerclken1", "timerclken2", "timerclken3";
43 assigned-clocks = <&v2m_sysctl 0>, <&v2m_sysctl 1>, <&v2m_sysctl 3>, <&v2m_sysctl 3>;
44 assigned-clock-parents = <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>, <&v2m_refclk1mhz>;