3 Chipid required properties:
4 - compatible: Should be "atmel,sama5d2-chipid" or "microchip,sama7g5-chipid"
5 - reg : Should contain registers location and length
7 PIT Timer required properties:
8 - compatible: Should be "atmel,at91sam9260-pit"
9 - reg: Should contain registers location and length
10 - interrupts: Should contain interrupt for the PIT which is the IRQ line
11 shared across all System Controller members.
13 PIT64B Timer required properties:
14 - compatible: Should be "microchip,sam9x60-pit64b"
15 - reg: Should contain registers location and length
16 - interrupts: Should contain interrupt for PIT64B timer
17 - clocks: Should contain the available clock sources for PIT64B timer.
19 System Timer (ST) required properties:
20 - compatible: Should be "atmel,at91rm9200-st", "syscon", "simple-mfd"
21 - reg: Should contain registers location and length
22 - interrupts: Should contain interrupt for the ST which is the IRQ line
23 shared across all System Controller members.
24 - clocks: phandle to input clock.
26 - watchdog: compatible should be "atmel,at91rm9200-wdt"
28 RSTC Reset Controller required properties:
29 - compatible: Should be "atmel,<chip>-rstc".
30 <chip> can be "at91sam9260", "at91sam9g45", "sama5d3" or "samx7"
31 it also can be "microchip,sam9x60-rstc"
32 - reg: Should contain registers location and length
33 - clocks: phandle to input clock.
38 compatible = "atmel,at91sam9260-rstc";
39 reg = <0xfffffd00 0x10>;
43 RAMC SDRAM/DDR Controller required properties:
44 - compatible: Should be "atmel,at91rm9200-sdramc", "syscon"
45 "atmel,at91sam9260-sdramc",
46 "atmel,at91sam9g45-ddramc",
47 "atmel,sama5d3-ddramc",
48 "microchip,sam9x60-ddramc"
49 - reg: Should contain registers location and length
53 ramc0: ramc@ffffe800 {
54 compatible = "atmel,at91sam9g45-ddramc";
55 reg = <0xffffe800 0x200>;
58 SHDWC Shutdown Controller
61 - compatible: Should be "atmel,<chip>-shdwc".
62 <chip> can be "at91sam9260", "at91sam9rl" or "at91sam9x5".
63 - reg: Should contain registers location and length
64 - clocks: phandle to input clock.
67 - atmel,wakeup-mode: String, operation mode of the wakeup mode.
68 Supported values are: "none", "high", "low", "any".
69 - atmel,wakeup-counter: Counter on Wake-up 0 (between 0x0 and 0xf).
71 optional at91sam9260 properties:
72 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
74 optional at91sam9rl properties:
75 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
76 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
78 optional at91sam9x5 properties:
79 - atmel,wakeup-rtc-timer: boolean to enable Real-time Clock Wake-up.
84 compatible = "atmel,at91sam9260-shdwc";
85 reg = <0xfffffd10 0x10>;
89 SHDWC SAMA5D2-Compatible Shutdown Controller
94 - compatible: should be "atmel,sama5d2-shdwc", "microchip,sam9x60-shdwc" or
95 "microchip,sama7g5-shdwc"
96 - reg: should contain registers location and length
97 - clocks: phandle to input clock.
98 - #address-cells: should be one. The cell is the wake-up input index.
99 - #size-cells: should be zero.
103 - debounce-delay-us: minimum wake-up inputs debouncer period in
104 microseconds. It's usually a board-related property.
105 - atmel,wakeup-rtc-timer: boolean to enable Real-Time Clock wake-up.
107 optional microchip,sam9x60-shdwc or microchip,sama7g5-shdwc properties:
108 - atmel,wakeup-rtt-timer: boolean to enable Real-time Timer Wake-up.
110 The node contains child nodes for each wake-up input that the platform uses.
114 Wake-up input nodes are usually described in the "board" part of the Device
115 Tree. Note also that input 0 is linked to the wake-up pin and is frequently
119 - reg: should contain the wake-up input index [0 - 15].
122 - atmel,wakeup-active-high: boolean, the corresponding wake-up input described
123 by the child, forces the wake-up of the core power supply on a high level.
124 The default is to be active low.
130 compatible = "atmel,sama5d2-shdwc";
131 reg = <0xf8048010 0x10>;
133 #address-cells = <1>;
135 atmel,wakeup-rtc-timer;
140 debounce-delay-us = <976>;
148 atmel,wakeup-active-high;
152 Special Function Registers (SFR)
154 Special Function Registers (SFR) manage specific aspects of the integrated
155 memory, bridge implementations, processor and other functionality not controlled
159 - compatible: Should be "atmel,<chip>-sfr", "syscon" or
160 "atmel,<chip>-sfrbu", "syscon"
161 <chip> can be "sama5d3", "sama5d4" or "sama5d2".
162 It also can be "microchip,sam9x60-sfr", "syscon".
163 - reg: Should contain registers location and length
166 compatible = "atmel,sama5d3-sfr", "syscon";
167 reg = <0xf0038000 0x60>;
170 Security Module (SECUMOD)
172 The Security Module macrocell provides all necessary secure functions to avoid
173 voltage, temperature, frequency and mechanical attacks on the chip. It also
174 embeds secure memories that can be scrambled.
176 The Security Module also offers the PIOBU pins which can be used as GPIO pins.
177 Note that they maintain their voltage during Backup/Self-refresh.
180 - compatible: Should be "atmel,<chip>-secumod", "syscon".
181 <chip> can be "sama5d2".
182 - reg: Should contain registers location and length
183 - gpio-controller: Marks the port as GPIO controller.
184 - #gpio-cells: There are 2. The pin number is the
185 first, the second represents additional
186 parameters such as GPIO_ACTIVE_HIGH/LOW.
190 compatible = "atmel,sama5d2-secumod", "syscon";
191 reg = <0xfc040000 0x100>;