Documentation/ABI/testing/sysfs-bus-cxl

   1 What:           /sys/bus/cxl/devices/memX/firmware_version
   2 Date:           December, 2020
   3 KernelVersion:  v5.12
   4 Contact:        linux-cxl@vger.kernel.org
   5 Description:
   6                 (RO) "FW Revision" string as reported by the Identify
   7                 Memory Device Output Payload in the CXL-2.0
   8                 specification.
   9
  10 What:           /sys/bus/cxl/devices/memX/ram/size
  11 Date:           December, 2020
  12 KernelVersion:  v5.12
  13 Contact:        linux-cxl@vger.kernel.org
  14 Description:
  15                 (RO) "Volatile Only Capacity" as bytes. Represents the
  16                 identically named field in the Identify Memory Device Output
  17                 Payload in the CXL-2.0 specification.
  18
  19 What:           /sys/bus/cxl/devices/memX/pmem/size
  20 Date:           December, 2020
  21 KernelVersion:  v5.12
  22 Contact:        linux-cxl@vger.kernel.org
  23 Description:
  24                 (RO) "Persistent Only Capacity" as bytes. Represents the
  25                 identically named field in the Identify Memory Device Output
  26                 Payload in the CXL-2.0 specification.
  27
  28 What:           /sys/bus/cxl/devices/*/devtype
  29 Date:           June, 2021
  30 KernelVersion:  v5.14
  31 Contact:        linux-cxl@vger.kernel.org
  32 Description:
  33                 CXL device objects export the devtype attribute which mirrors
  34                 the same value communicated in the DEVTYPE environment variable
  35                 for uevents for devices on the "cxl" bus.
  36
  37 What:           /sys/bus/cxl/devices/portX/uport
  38 Date:           June, 2021
  39 KernelVersion:  v5.14
  40 Contact:        linux-cxl@vger.kernel.org
  41 Description:
  42                 CXL port objects are enumerated from either a platform firmware
  43                 device (ACPI0017 and ACPI0016) or PCIe switch upstream port with
  44                 CXL component registers. The 'uport' symlink connects the CXL
  45                 portX object to the device that published the CXL port
  46                 capability.
  47
  48 What:           /sys/bus/cxl/devices/portX/dportY
  49 Date:           June, 2021
  50 KernelVersion:  v5.14
  51 Contact:        linux-cxl@vger.kernel.org
  52 Description:
  53                 CXL port objects are enumerated from either a platform firmware
  54                 device (ACPI0017 and ACPI0016) or PCIe switch upstream port with
  55                 CXL component registers. The 'dportY' symlink identifies one or
  56                 more downstream ports that the upstream port may target in its
  57                 decode of CXL memory resources.  The 'Y' integer reflects the
  58                 hardware port unique-id used in the hardware decoder target
  59                 list.